JEDEC JESD209-2F
Low Power Double Data Rate 2 (LPDDR2)
contributor author | JEDEC - Solid State Technology Association | |
date accessioned | 2017-09-04T18:01:04Z | |
date available | 2017-09-04T18:01:04Z | |
date copyright | 06/01/2012 | |
date issued | 2012 | |
identifier other | FYHTEFAAAAAAAAAA.pdf | |
identifier uri | https://lib.yabesh.ir/std/handle/yse/184111 | |
description abstract | This document defines the LPDDR2 standard, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. This standard covers the following technologies: LPDDR2-S2A, LPDDR2-S2B, LPDDR2-S4A, LPDDR2-S4B, LPDDR2-N-A, and LPDDR2-N-B. The purpose of this standard is to define the minimum set of requirements for JEDEC compliant 64 Mb through 8 Gb for x8, x16, and x32 SDRAM devices as well as 64 Mb through 32 Gb for x8, x16, and x32 for NVM devices. This document was created using aspects of the following standards: DDR2 (JESD79-2), DDR3 (JESD79-3), LPDDR (JESD209), and LPDDR-NVM (N07-NV1A). Each aspect of the standard was considered and approved by committee ballot(s). The accumulation of these ballots were then incorporated to prepare the LPDDR2 Standard. | |
language | English | |
title | JEDEC JESD209-2F | num |
title | Low Power Double Data Rate 2 (LPDDR2) | en |
type | standard | |
page | 284 | |
status | Active | |
tree | JEDEC - Solid State Technology Association:;2012 | |
contenttype | fulltext |