JEDEC JEP154
Guideline for Characterizing Solder Bump Electromigration under Constant Current and Temperature Stress
contributor author | JEDEC - Solid State Technology Association | |
date accessioned | 2017-09-04T18:02:31Z | |
date available | 2017-09-04T18:02:31Z | |
date copyright | 01/01/2008 | |
date issued | 2008 | |
identifier other | GCDJCCAAAAAAAAAA.pdf | |
identifier uri | https://lib.yabesh.ir/std/handle/yse/185559 | |
description abstract | This document describes a method to test the electromigration (EM) susceptibility of solder bumps, including other types of bumps, such as solder capped copper pillars, used in flip-chip packages. The method is valid for Sn/Pb eutectic, high Pb, and Pb-free solder bumps. The document discusses the advantages and concerns associated with EM testing, as well as options for data analysis. | |
language | English | |
title | JEDEC JEP154 | num |
title | Guideline for Characterizing Solder Bump Electromigration under Constant Current and Temperature Stress | en |
type | standard | |
page | 30 | |
status | Active | |
tree | JEDEC - Solid State Technology Association:;2008 | |
contenttype | fulltext | |
subject keywords | pro |