JEDEC JESD22-A103D
High Temperature Storage Life
Organization:
JEDEC - Solid State Technology Association
Year: 2010
Abstract: The test is applicable for evaluation, screening, monitoring, and/or qualification of all solid state devices.
The high temperature storage test is typically used to determine the effects of time and temperature, under storage conditions, for thermally activated failure mechanisms and time-to-failure distributions of solid state electronic devices, including nonvolatile memory devices (data retention failure mechanisms). Thermally activated failure mechanisms are modeled using the Arrhenius Equation for acceleration. During the test, accelerated stress temperatures are used without electrical conditions applied. This test may be destructive, depending on time, temperature and packaging (if any).
The high temperature storage test is typically used to determine the effects of time and temperature, under storage conditions, for thermally activated failure mechanisms and time-to-failure distributions of solid state electronic devices, including nonvolatile memory devices (data retention failure mechanisms). Thermally activated failure mechanisms are modeled using the Arrhenius Equation for acceleration. During the test, accelerated stress temperatures are used without electrical conditions applied. This test may be destructive, depending on time, temperature and packaging (if any).
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JEDEC JESD22-A103D
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contributor author | JEDEC - Solid State Technology Association | |
date accessioned | 2017-09-04T18:10:07Z | |
date available | 2017-09-04T18:10:07Z | |
date copyright | 40513 | |
date issued | 2010 | |
identifier other | GWMGFDAAAAAAAAAA.pdf | |
identifier uri | https://lib.yabesh.ir/std/handle/yse/193156 | |
description abstract | The test is applicable for evaluation, screening, monitoring, and/or qualification of all solid state devices. The high temperature storage test is typically used to determine the effects of time and temperature, under storage conditions, for thermally activated failure mechanisms and time-to-failure distributions of solid state electronic devices, including nonvolatile memory devices (data retention failure mechanisms). Thermally activated failure mechanisms are modeled using the Arrhenius Equation for acceleration. During the test, accelerated stress temperatures are used without electrical conditions applied. This test may be destructive, depending on time, temperature and packaging (if any). | |
language | English | |
title | JEDEC JESD22-A103D | num |
title | High Temperature Storage Life | en |
type | standard | |
page | 10 | |
status | Active | |
tree | JEDEC - Solid State Technology Association:;2010 | |
contenttype | fulltext |