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JEDEC JESD82-25
Definition of the SSTUB32866 1.8 V Configurable Registered Buffer with Parity Test for DDR2 RDIMM Applications
Organization:
JEDEC - Solid State Technology Association
Year: 2007
Abstract: This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUB32866 registered buffer with parity test for DDR2 RDIMM applications.
Subject: Buffer
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JEDEC JESD82-25
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| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T18:22:52Z | |
| date available | 2017-09-04T18:22:52Z | |
| date copyright | 05/01/2007 | |
| date issued | 2007 | |
| identifier other | ICNEACAAAAAAAAAA.pdf | |
| identifier uri | https://lib.yabesh.ir/std/handle/yse/205276 | |
| description abstract | This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTUB32866 registered buffer with parity test for DDR2 RDIMM applications. | |
| language | English | |
| title | JEDEC JESD82-25 | num |
| title | Definition of the SSTUB32866 1.8 V Configurable Registered Buffer with Parity Test for DDR2 RDIMM Applications | en |
| type | standard | |
| page | 44 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;2007 | |
| contenttype | fulltext | |
| subject keywords | Buffer | |
| subject keywords | DDR2 | |
| subject keywords | RDIMM | |
| subject keywords | Register | |
| subject keywords | SSTU | |
| subject keywords | SSTUB |