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JEDEC JESD92
Procedure for Characterizing Time- Dependent Dielectric Breakdown of Ultra-Thin Gate Dielectrics
Organization:
JEDEC - Solid State Technology Association
Year: 2003
Abstract: This document defines a constant voltage stress test procedure for characterizing time-dependent dielectric breakdown or Â"wear-outÂ" of thin gate dielectrics used in integrated circuit technologies. The test is designed to obtain voltage and temperature acceleration parameters required to estimate oxide life at use conditions. The test procedure includes sophisticated techniques to detect breakdown in ultra-thin films that typically exhibit large tunneling currents and soft or noisy breakdown characteristics. This document includes an annex that discusses test structure design, methods to determine the oxide electric field in ultra-thin films, statistical models, extrapolation models, and example failure-rate calculations.
Subject: DIELECTRIC BREAKDOWN
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| contributor author | JEDEC - Solid State Technology Association | |
| date accessioned | 2017-09-04T18:08:38Z | |
| date available | 2017-09-04T18:08:38Z | |
| date copyright | 08/01/2003 | |
| date issued | 2003 | |
| identifier other | GSEWDBAAAAAAAAAA.pdf | |
| identifier uri | https://lib.yabesh.ir/std/handle/yse/191597 | |
| description abstract | This document defines a constant voltage stress test procedure for characterizing time-dependent dielectric breakdown or Â"wear-outÂ" of thin gate dielectrics used in integrated circuit technologies. The test is designed to obtain voltage and temperature acceleration parameters required to estimate oxide life at use conditions. The test procedure includes sophisticated techniques to detect breakdown in ultra-thin films that typically exhibit large tunneling currents and soft or noisy breakdown characteristics. This document includes an annex that discusses test structure design, methods to determine the oxide electric field in ultra-thin films, statistical models, extrapolation models, and example failure-rate calculations. | |
| language | English | |
| title | JEDEC JESD92 | num |
| title | Procedure for Characterizing Time- Dependent Dielectric Breakdown of Ultra-Thin Gate Dielectrics | en |
| type | standard | |
| page | 32 | |
| status | Active | |
| tree | JEDEC - Solid State Technology Association:;2003 | |
| contenttype | fulltext | |
| subject keywords | DIELECTRIC BREAKDOWN | |
| subject keywords | GATE DIELECTRICS | |
| subject keywords | TIME-DEPENDENT | |
| subject keywords | ULTRA-THIN |